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IEEE 1212 Document Information:
Title
Standard for a Control and Status Registers (CSR) Architecture for Microcomputer Buses
The Institute of Electrical and Electronics Engineers, Inc.
Publication Date:
Jan 1, 2001
Scope:
This is a full-use standard, a revision of ISO/IEC 13213:1994 [B11]; its scope reflects accumulated experience with the control and status registers (CSR) architecture since it was first promulgated as a standard in 1991. In the intervening years, two bus standards, IEEE Std 1596-1992™ [B5] on Scalable Coherent Interface (SCI), and IEEE Std 1394-1995™ [B3] on Serial Bus, as amended by IEEE Std 1394a-2000™ [B4], have been the source of most practical implementation experience. The revised scope of the CSR architecture is given below:
a) The overall architectural framework partitions the total available address space into equal spaces available to individual nodes. A node’s address space is in turn partitioned into regions which have different usage models, e.g., memory space, private space for vendor uses, configuration ROM, and an I/O space (units space) where transactions may have side effects;
b) A minimal transaction set (read, write, and lock requests and their associated completion responses) required for compliant bus standards. Bus bridges compliant with this architecture, whether in a homogeneous or heterogeneous environment, are also expected to transport this transaction set;
c) Fundamental CSRs are defined to provide a common infrastructure for all compliant buses. In some cases the details of the registers are entirely bus-dependent but the function is common to all compliant buses;
d) Message request and response CSRs are specified to enable directed delivery or broadcast of messages to multiple nodes. The message format permits organizations or vendors to define the meaning of the data payload without the need for a centralized registry of all possible formats; and
e) Configuration ROM provides self-descriptive data structures that permit nodes to uniformly characterize the device services available. This is critical for buses that permit live insertion and removal of nodes; each newly inserted node contains sufficient information for it to be uniquely identified and for the requisite device drivers to be loaded.
Although the original CSR architecture anticipated widespread development of bridges between heterogeneous bus standards and a diversity of addressing modes, both fixed and variable, no such implementations have been made. As a consequence, the most significant changes in scope between the earlier CSR architecture and this standard are the adoption of a single, fixed addressing model and the removal of tutorial material pertaining to the design of bridges.
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