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Document SEMI M57 is offered by IHS as part of an online subscription. This subscription contains many documents on the same topic.
You may also purchase this document alone from the IHS Standards Store.
SEMI M57 Document Information:
Title
GUIDE FOR SPECIFYING SILICON ANNEALED WAFERS
Semiconductor Equipment and Materials International
Publication Date:
Jul 1, 2006
Scope:
This guide covers dimensional, electrical, chemical, and
structural properties of silicon annealed wafers for 180 nm, 130
nm, and 90 nm device technology generations.
Based on the guidance herein, the user of the guide can generate
specifications for silicon annealed wafers.
One of the reasons for using annealed wafers is to allow a
reduction in the crystal originated particles (COP) near the top
surface region of the wafer. Currently, only the COP surface
density can be estimated.
The width of the denuded zone (DZ) free of bulk micro defects
(BMD) is also an important parameter. However, there is no
standardized method to evaluate this characteristic at the present
time.
The complete EDI Code List for items in the Order Form
appropriate to silicon wafers, including annealed wafers, can be
found in SEMI M18.
NOTICE: This standard does not purport to
address safety issues, if any, associated with its use. It is the
responsibility of the users of this standard to establish
appropriate safety and health practices and determine the
applicability of regulatory or other limitations prior to use.
Purpose
A number of device manufacturers utilize silicon annealed wafers
to gain improved device characteristics. This guide provides
information for developing specifications for silicon annealed
wafers used to fabricate semiconductor devices and integrated
circuits.
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