IEEE Begins Standard for On-Chip Scan Compression Tool Interoperability - IEEE 1450.6.1
May 30, 2007 // Published as a news service by IHS
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The Institute of Electrical and Electronics Engineers (IEEE) began work on IEEE 1450.6.1 - Standard for Describing On-Chip Scan Compression, which will offer uniform approaches to interfacing test pattern and diagnosis tools to foster interoperability across test platforms from various vendors.
This standard, which is being developed within the IEEE corporate standards program, will be based on the Open Compression Interface (OCI 1.0) test standard completed in 2006 by Accelera, the electronics industry organization focused on electronic design automation (EDA) standards.
The IEEE said it began working on this standard because many proprietary on-chip scan compression tools available limit the ability of designers to work with alternative vendors at different stages of the testing process.
"The extreme complexity of current system-on-chip designs with their multimillion gate counts has made on-chip scan compression essential in testing for submicron defects," said Bruce Cory, chair of the Standard for Describing On-Chip Scan Compression Working Group and Design for Test Manager at NVIDIA.
"Before the prevalence of on-chip scan compression, we could select different EDA tool vendors for scan insertion, pattern generation and diagnosis," he said. "With on-chip methods now the norm, we've lost this flexibility because vendors have proprietary scan-compression logic and tool-specific ways to pass information from scan insertion to pattern generation to diagnosis."
IEEE 1450.6.1 will describe on-chip scan compression structures for pattern generation and diagnosis so on-chip scan compression tools from different suppliers can work together independent of the logic used. This will help designers select the best tools for their applications. The standard also will contain several examples in an appendix: five cases will come from OCI 1.0 and several others will be created as the IEEE standard is developed.
IEEE 1450.6.1 is part of the IEEE 1450 family of standards that address standard tester interface language (STIL). IEEE 1450.6.1 will build upon IEEE 1450.6, an extension to STIL called CTL that allows STIL to support core-based design testing.
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IEEE 1450 standards are sponsored by the Test Technology Committee of the IEEE Computer Society. For more information on this standard and the working group developing it, visit http://grouper.ieee.org/groups/ctl/oci/index.html.
Source: Institute of Electrical and Electronics Engineers (IEEE).